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@@ -5,6 +5,7 @@
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package bpf
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import (
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+ "fmt"
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"io/ioutil"
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"reflect"
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"strconv"
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@@ -172,3 +173,353 @@ func TestAsmDisasm(t *testing.T) {
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}
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}
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}
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+
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+type InvalidInstruction struct{}
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+
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+func (a InvalidInstruction) Assemble() (RawInstruction, error) {
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+ return RawInstruction{}, fmt.Errorf("Invalid Instruction")
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+}
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+
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+func (a InvalidInstruction) String() string {
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+ return fmt.Sprintf("unknown instruction: %#v", a)
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+}
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+
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+func TestString(t *testing.T) {
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+ testCases := []struct {
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+ instruction Instruction
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+ assembler string
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+ }{
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+ {
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+ instruction: LoadConstant{Dst: RegA, Val: 42},
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+ assembler: "ld #42",
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+ },
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+ {
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+ instruction: LoadConstant{Dst: RegX, Val: 42},
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+ assembler: "ldx #42",
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+ },
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+ {
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+ instruction: LoadConstant{Dst: 0xffff, Val: 42},
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+ assembler: "unknown instruction: bpf.LoadConstant{Dst:0xffff, Val:0x2a}",
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+ },
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+ {
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+ instruction: LoadScratch{Dst: RegA, N: 3},
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+ assembler: "ld M[3]",
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+ },
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+ {
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+ instruction: LoadScratch{Dst: RegX, N: 3},
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+ assembler: "ldx M[3]",
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+ },
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+ {
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+ instruction: LoadScratch{Dst: 0xffff, N: 3},
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+ assembler: "unknown instruction: bpf.LoadScratch{Dst:0xffff, N:3}",
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+ },
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+ {
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+ instruction: LoadAbsolute{Off: 42, Size: 1},
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+ assembler: "ldb [42]",
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+ },
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+ {
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+ instruction: LoadAbsolute{Off: 42, Size: 2},
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+ assembler: "ldh [42]",
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+ },
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+ {
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+ instruction: LoadAbsolute{Off: 42, Size: 4},
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+ assembler: "ld [42]",
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+ },
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+ {
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+ instruction: LoadAbsolute{Off: 42, Size: -1},
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+ assembler: "unknown instruction: bpf.LoadAbsolute{Off:0x2a, Size:-1}",
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+ },
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+ {
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+ instruction: LoadIndirect{Off: 42, Size: 1},
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+ assembler: "ldb [x + 42]",
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+ },
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+ {
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+ instruction: LoadIndirect{Off: 42, Size: 2},
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+ assembler: "ldh [x + 42]",
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+ },
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+ {
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+ instruction: LoadIndirect{Off: 42, Size: 4},
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+ assembler: "ld [x + 42]",
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+ },
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+ {
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+ instruction: LoadIndirect{Off: 42, Size: -1},
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+ assembler: "unknown instruction: bpf.LoadIndirect{Off:0x2a, Size:-1}",
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+ },
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+ {
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+ instruction: LoadMemShift{Off: 42},
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+ assembler: "ldx 4*([42]&0xf)",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtLen},
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+ assembler: "ld #len",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtProto},
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+ assembler: "ld #proto",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtType},
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+ assembler: "ld #type",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtPayloadOffset},
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+ assembler: "ld #poff",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtInterfaceIndex},
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+ assembler: "ld #ifidx",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtNetlinkAttr},
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+ assembler: "ld #nla",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtNetlinkAttrNested},
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+ assembler: "ld #nlan",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtMark},
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+ assembler: "ld #mark",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtQueue},
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+ assembler: "ld #queue",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtLinkLayerType},
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+ assembler: "ld #hatype",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtRXHash},
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+ assembler: "ld #rxhash",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtCPUID},
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+ assembler: "ld #cpu",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtVLANTag},
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+ assembler: "ld #vlan_tci",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtVLANTagPresent},
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+ assembler: "ld #vlan_avail",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtVLANProto},
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+ assembler: "ld #vlan_tpid",
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+ },
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+ {
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+ instruction: LoadExtension{Num: ExtRand},
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+ assembler: "ld #rand",
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+ },
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+ {
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+ instruction: LoadAbsolute{Off: 0xfffff038, Size: 4},
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+ assembler: "ld #rand",
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+ },
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+ {
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+ instruction: LoadExtension{Num: 0xfff},
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+ assembler: "unknown instruction: bpf.LoadExtension{Num:4095}",
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+ },
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+ {
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+ instruction: StoreScratch{Src: RegA, N: 3},
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+ assembler: "st M[3]",
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+ },
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+ {
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+ instruction: StoreScratch{Src: RegX, N: 3},
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+ assembler: "stx M[3]",
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+ },
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+ {
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+ instruction: StoreScratch{Src: 0xffff, N: 3},
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+ assembler: "unknown instruction: bpf.StoreScratch{Src:0xffff, N:3}",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpAdd, Val: 42},
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+ assembler: "add #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpSub, Val: 42},
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+ assembler: "sub #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpMul, Val: 42},
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+ assembler: "mul #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpDiv, Val: 42},
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+ assembler: "div #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpOr, Val: 42},
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+ assembler: "or #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpAnd, Val: 42},
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+ assembler: "and #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpShiftLeft, Val: 42},
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+ assembler: "lsh #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpShiftRight, Val: 42},
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+ assembler: "rsh #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpMod, Val: 42},
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+ assembler: "mod #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: ALUOpXor, Val: 42},
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+ assembler: "xor #42",
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+ },
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+ {
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+ instruction: ALUOpConstant{Op: 0xffff, Val: 42},
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+ assembler: "unknown instruction: bpf.ALUOpConstant{Op:0xffff, Val:0x2a}",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpAdd},
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+ assembler: "add x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpSub},
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+ assembler: "sub x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpMul},
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+ assembler: "mul x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpDiv},
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+ assembler: "div x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpOr},
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+ assembler: "or x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpAnd},
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+ assembler: "and x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpShiftLeft},
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+ assembler: "lsh x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpShiftRight},
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+ assembler: "rsh x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpMod},
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+ assembler: "mod x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: ALUOpXor},
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+ assembler: "xor x",
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+ },
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+ {
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+ instruction: ALUOpX{Op: 0xffff},
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+ assembler: "unknown instruction: bpf.ALUOpX{Op:0xffff}",
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+ },
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+ {
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+ instruction: NegateA{},
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+ assembler: "neg",
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+ },
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+ {
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+ instruction: Jump{Skip: 10},
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+ assembler: "ja 10",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpEqual, Val: 42, SkipTrue: 8, SkipFalse: 9},
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+ assembler: "jeq #42,8,9",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpEqual, Val: 42, SkipTrue: 8},
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+ assembler: "jeq #42,8",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpEqual, Val: 42, SkipFalse: 8},
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+ assembler: "jneq #42,8",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpNotEqual, Val: 42, SkipTrue: 8},
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+ assembler: "jneq #42,8",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpLessThan, Val: 42, SkipTrue: 7},
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+ assembler: "jlt #42,7",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpLessOrEqual, Val: 42, SkipTrue: 6},
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+ assembler: "jle #42,6",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpGreaterThan, Val: 42, SkipTrue: 4, SkipFalse: 5},
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+ assembler: "jgt #42,4,5",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpGreaterThan, Val: 42, SkipTrue: 4},
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+ assembler: "jgt #42,4",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpGreaterOrEqual, Val: 42, SkipTrue: 3, SkipFalse: 4},
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+ assembler: "jge #42,3,4",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpGreaterOrEqual, Val: 42, SkipTrue: 3},
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+ assembler: "jge #42,3",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpBitsSet, Val: 42, SkipTrue: 2, SkipFalse: 3},
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+ assembler: "jset #42,2,3",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpBitsSet, Val: 42, SkipTrue: 2},
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+ assembler: "jset #42,2",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpBitsNotSet, Val: 42, SkipTrue: 2, SkipFalse: 3},
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+ assembler: "jset #42,3,2",
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+ },
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+ {
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+ instruction: JumpIf{Cond: JumpBitsNotSet, Val: 42, SkipTrue: 2},
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+ assembler: "jset #42,0,2",
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+ },
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+ {
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+ instruction: JumpIf{Cond: 0xffff, Val: 42, SkipTrue: 1, SkipFalse: 2},
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+ assembler: "unknown instruction: bpf.JumpIf{Cond:0xffff, Val:0x2a, SkipTrue:0x1, SkipFalse:0x2}",
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+ },
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+ {
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+ instruction: TAX{},
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+ assembler: "tax",
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+ },
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+ {
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+ instruction: TXA{},
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+ assembler: "txa",
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+ },
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+ {
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+ instruction: RetA{},
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+ assembler: "ret a",
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+ },
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+ {
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+ instruction: RetConstant{Val: 42},
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+ assembler: "ret #42",
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+ },
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+ // Invalid instruction
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+ {
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+ instruction: InvalidInstruction{},
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+ assembler: "unknown instruction: bpf.InvalidInstruction{}",
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+ },
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+ }
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+
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+ for _, testCase := range testCases {
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+ if input, ok := testCase.instruction.(fmt.Stringer); ok {
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+ got := input.String()
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+ if got != testCase.assembler {
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+ t.Errorf("String did not return expected assembler notation, expected: %s, got: %s", testCase.assembler, got)
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+ }
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+ } else {
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+ t.Errorf("Instruction %#v is not a fmt.Stringer", testCase.instruction)
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+ }
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+ }
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+}
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